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CVS commit: src/sys/arch/mips/mips
Module Name: src
Committed By: skrll
Date: Wed Jun 7 08:45:51 UTC 2017
Modified Files:
src/sys/arch/mips/mips: locore_mips1.S
Log Message:
fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value
and not a mask
To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.92 src/sys/arch/mips/mips/locore_mips1.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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