CVS commit: src/sys/arch/amd64

["Maxime Villard" <maxv%netbsd.org@localhost>]

Module Name:    src
Committed By:   maxv
Date:           Fri Sep 15 17:32:12 UTC 2017

Modified Files:
        src/sys/arch/amd64/amd64: amd64_trap.S locore.S
        src/sys/arch/amd64/include: frameasm.h

Log Message:
Declare INTRFASTEXIT as a function, so that there is only one iretq in the
kernel. Then, check %rip against the address of this iretq instead of
disassembling (%rip) - which could fault again, or point at some random
address which happens to contain the iretq opcode. The same is true for gs
below, but I'll fix that in another commit.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/amd64/amd64/amd64_trap.S
cvs rdiff -u -r1.128 -r1.129 src/sys/arch/amd64/amd64/locore.S
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/amd64/include/frameasm.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.