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CVS commit: src/sys/arch/x86/include
Module Name: src
Committed By: msaitoh
Date: Wed Jan 10 07:04:54 UTC 2018
Modified Files:
src/sys/arch/x86/include: specialreg.h
Log Message:
Add Intel cpuid 7 %edx IBRS(IBPB Speculation Control) and
STIBP(STIBP Speculation Control) from OpenBSD.
To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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