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CVS commit: src/sys/arch/x86/x86
Module Name: src
Committed By: maya
Date: Wed Feb 7 22:49:32 UTC 2018
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
stopgap fix: restrict XSAVEOPT to Intel CPUs
The current code causes floating point miscalculations on AMD Ryzen.
PR port-amd64/52966: amd64 FPU handling broken on AMD
To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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