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CVS commit: src/sys/arch/mips/mips



Module Name:    src
Committed By:   maya
Date:           Wed Mar  7 15:44:15 UTC 2018

Modified Files:
        src/sys/arch/mips/mips: locore.S

Log Message:
Replace early interrupt disable code.

As suggested by dh, carefully disable interrupts before frobbing
interrupt mask, which might trigger more interrupts.

Don't bother with keeping BEV and such.
Note that we are zeroing out STATUS later on in the (NOFPU || emips)
case right now.

This change is risky for emips which wasn't tested and didn't reach
userland before.


To generate a diff of this commit:
cvs rdiff -u -r1.210 -r1.211 src/sys/arch/mips/mips/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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