CVS commit: [netbsd-8] src/sys/dev/pci/ixgbe

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    src
Committed By:   martin
Date:           Thu Mar  8 12:31:25 UTC 2018

Modified Files:
        src/sys/dev/pci/ixgbe [netbsd-8]: ixgbe.c ixgbe.h ixv.c

Log Message:
Pull up following revision(s) (requested by knakahara in ticket #612):
        sys/dev/pci/ixgbe/ixgbe.c: revision 1.129-1.133
        sys/dev/pci/ixgbe/ixgbe.h: revision 1.34
        sys/dev/pci/ixgbe/ixv.c: revision 1.85,1.86

- Make "Handled queue in softint" and "Requeued in softint" evcnt(9) per queue
  and count them correctly.
- Remove #if 0'ed code.

Don't increment que->req.ev_count in MSI-X interrupt because it's not
reschedule.

Fix another poll mode assumption breaking. Implemented by msaitoh@n.o, I just commit by proxy.
ixgbe_rearm_queues() writes EICS register(s). 82599, X540 and X550
specifications say "Following a write of 1b to any bit in the EICS register
(interrupt cause set), its corresponding bit in the EIMS register is auto
set as well enabling its interrupt." in "Extended Interrupt Auto Mask Enable
(EIAM) Register" section. That is, ixgbe_rearm_queues() causes interrupts
regardless of the status managed by ixgbe_enable_queue()/ixgbe_disable_queue().

That can break poll mode assumption.

In fact, the problem occurs in the following situation
    - CPU#A has high load traffic, in contrast, CPU#B has not so high load traffic
    - CPU#A is occurred interrupt by its NIC queue
      - CPU#A calls ixgbe_disable_queue() in interrupt handler(ixgbe_msix_que())
      - CPU#A kick softint handler(ixgbe_handle_que())
        - CPU#A begins softint
        - CPU#A's NIC queue is set que->txr->busy flag
        - With some reason, CPU#A can do ixg interrupt handler
          E.g. when one of CPU#A's softnet handlers sleeps, ipl is lowered
    - CPU#B starts callout
      - CPU#B calls ixgbe_local_timer1()
        - CPU#B writes EICS bit corresponding CPU#A's NIC queue bit
    - CPU#A's NIC queue causes interrupt whie CPU#A is running in poll mode
      - CPU#A calls ixgbe_disable_queue() in interrupt handler *again*
    - CPU#A has done polling, and then CPU#A calls ixgbe_enable_queue() *once*
    - CPU#A's NIC queue interrupt is disabled until ixg is detached as
      ixgbe_disable_queue() is called twice though ixgbe_disable_queue() is
      called once only
NOTE:
82598 does not say so, but it is treated in the same way because of no harm.
By the way, we will refactor ixgbe_local_timer(watchdog processing) later.

Fix INTx/MSI handler did not schedule workqueue. Pointed out by msaitoh@n.o.

Reduce duplicated code which schedule deferred packet processing. No functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.88.2.12 -r1.88.2.13 src/sys/dev/pci/ixgbe/ixgbe.c
cvs rdiff -u -r1.24.6.5 -r1.24.6.6 src/sys/dev/pci/ixgbe/ixgbe.h
cvs rdiff -u -r1.56.2.9 -r1.56.2.10 src/sys/dev/pci/ixgbe/ixv.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.