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CVS commit: src/sys/arch/arm/sunxi
Module Name: src
Committed By: bouyer
Date: Sun Apr 1 21:19:18 UTC 2018
Modified Files:
src/sys/arch/arm/sunxi: files.sunxi sun4i_a10_ccu.c sunxi_ccu.c
sunxi_ccu.h sunxi_ccu_fractional.c
Added Files:
src/sys/arch/arm/sunxi: sunxi_ccu_display.c
Log Message:
Add a round_rate() callback for the sunxi clock domain.
Add a sunxi_ccu_display.c file with helpers for setting up display engine
clocks.
for fractional clocks, rename frac_en to div_en, I got the logic inverted.
Adjust tcon0-ch0, tcon0-ch1, tcon1-ch0 and tcon1-ch1 definitions to
automatically select a parent. tcon0 hardcoded to pll3 and tcon1 to pll7.
Define a round_rate() callback for these clocks, as well as fractional clocks.
Hardcode debe clocks parent to pll5.
To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/sunxi/files.sunxi
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/sunxi/sun4i_a10_ccu.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/sunxi/sunxi_ccu.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/sunxi/sunxi_ccu.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/sunxi/sunxi_ccu_display.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/sunxi/sunxi_ccu_fractional.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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