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CVS commit: src/sys
Module Name: src
Committed By: jmcneill
Date: Sat Jun 30 16:30:35 UTC 2018
Modified Files:
src/sys/arch/arm/fdt: files.fdt
src/sys/arch/evbarm/conf: EXYNOS GENERIC GENERIC64 RPI RPI64 SUNXI
TEGRA TI VEXPRESS_A15 VIRT
src/sys/dev/fdt: cpus.c
Log Message:
cpus: use fdt_add_bus
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/fdt/files.fdt
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/evbarm/conf/EXYNOS
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/conf/GENERIC \
src/sys/arch/evbarm/conf/RPI64
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/evbarm/conf/GENERIC64
cvs rdiff -u -r1.79 -r1.80 src/sys/arch/evbarm/conf/RPI
cvs rdiff -u -r1.76 -r1.77 src/sys/arch/evbarm/conf/SUNXI
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/evbarm/conf/TEGRA
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbarm/conf/TI
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/evbarm/conf/VEXPRESS_A15
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/conf/VIRT
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/fdt/cpus.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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