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CVS commit: src/sys/arch/arm/samsung



Module Name:    src
Committed By:   jmcneill
Date:           Wed Jul  4 13:14:51 UTC 2018

Modified Files:
        src/sys/arch/arm/samsung: exynos_sscom.c sscom.c sscom_var.h

Log Message:
Only process a tx or rx interrupt if the pending bit is set.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/samsung/exynos_sscom.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/samsung/sscom.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/samsung/sscom_var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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