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CVS commit: src/tests/include/sys
Module Name: src
Committed By: kamil
Date: Wed Jul 25 22:00:32 UTC 2018
Modified Files:
src/tests/include/sys: t_bitops.c
Log Message:
Avoid undefined behavior in an ATF test: t_bitops
Do not change the signedness bit with a left shift operation.
Switch to unsigned integer to prevent this.
t_bitops.c:189:9, left shift of 1 by 31 places cannot be represented in type 'int'
Detected with micro-UBSan in the user mode.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/tests/include/sys/t_bitops.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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