CVS commit: [netbsd-8] src/sys/external/bsd

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    src
Committed By:   martin
Date:           Fri Aug 31 17:43:03 UTC 2018

Modified Files:
        src/sys/external/bsd/common/include/linux [netbsd-8]: kernel.h
        src/sys/external/bsd/drm2/i915drm [netbsd-8]: intel_gtt.c
        src/sys/external/bsd/drm2/include/linux [netbsd-8]: bitops.h delay.h
            vmalloc.h

Log Message:
Pull up following revision(s) (requested by riastradh in ticket #997):

        sys/external/bsd/drm2/i915drm/intel_gtt.c: revision 1.6
        sys/external/bsd/drm2/include/linux/delay.h: revision 1.5
        sys/external/bsd/common/include/linux/kernel.h: revision 1.9
        sys/external/bsd/drm2/include/linux/vmalloc.h: revision 1.5
        sys/external/bsd/drm2/include/linux/bitops.h: revision 1.12
        sys/external/bsd/drm2/include/linux/bitops.h: revision 1.13

hweight32 should take uint32_t, not uint16_t.  OOPS.
XXX pullup

Fix find_first_zero_bit to find the high bits of 64-bit words...oops.
XXX pullup

Use uvm_km_alloc(kernel_map) and pmap_kenter, not uvm_pagermapin.
XXX pullup

Flush chipset writes after GGTT update.

Echoes Linux commit:

commit 8516673a996870ea0ceb337ee4f83c33c5ec3111
Author: Chris Wilson <chris%chris-wilson.co.uk@localhost>
Date:   Fri Dec 8 21:46:16 2017 +0000
    agp/intel: Flush all chipset writes after updating the GGTT
    Before accessing the GGTT we must flush the PTE writes and make them
    visible to the chipset, or else the indirect access may end up in the
    wrong page. In commit 3497971a71d8 ("agp/intel: Flush chipset writes
    after updating a single PTE"), we noticed corruption of the uploads for
    pwrite and for capturing GPU error states, but it was presumed that the
    explicit calls to intel_gtt_chipset_flush() were sufficient for the
    execbuffer path. However, we have not been flushing the chipset between
    the PTE writes and access via the GTT itself.
    For simplicity, do the flush after any PTE update rather than try and
    batch the flushes on a just-in-time basis.
    References: 3497971a71d8 ("agp/intel: Flush chipset writes after updating a single PTE")
    Signed-off-by: Chris Wilson <chris%chris-wilson.co.uk@localhost>
    Cc: Tvrtko Ursulin <tvrtko.ursulin%intel.com@localhost>
    Cc: Mika Kuoppala <mika.kuoppala%intel.com@localhost>
    Cc: drm-intel-fixes%lists.freedesktop.org@localhost
    Reviewed-by: Joonas Lahtinen <joonas.lahtinen%linux.intel.com@localhost>
    Link: https://patchwork.freedesktop.org/patch/msgid/20171208214616.30147-1-chris%chris-wilson.co.uk@localhost

XXX pullup

Round nsec up for usec delay.
XXX pullup

libkern min/max is 32-bit.  Linux min/max is generic.  @!*#@!$&
XXX pullup


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.8.10.1 \
    src/sys/external/bsd/common/include/linux/kernel.h
cvs rdiff -u -r1.5 -r1.5.10.1 src/sys/external/bsd/drm2/i915drm/intel_gtt.c
cvs rdiff -u -r1.11 -r1.11.10.1 \
    src/sys/external/bsd/drm2/include/linux/bitops.h
cvs rdiff -u -r1.4 -r1.4.10.1 src/sys/external/bsd/drm2/include/linux/delay.h
cvs rdiff -u -r1.4 -r1.4.12.1 \
    src/sys/external/bsd/drm2/include/linux/vmalloc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.