CVS commit: src/sys/arch/arm/cortex

["Jared D. McNeill" <jmcneill%netbsd.org@localhost>]

Module Name:    src
Committed By:   jmcneill
Date:           Tue Nov 13 22:25:29 UTC 2018

Modified Files:
        src/sys/arch/arm/cortex: gic_reg.h gicv3.c

Log Message:
Update GICD_CTLR reg bit definitions to reflect the layout of the register
when either in non-secure state or for a system that only supports a single
state.


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/cortex/gic_reg.h \
    src/sys/arch/arm/cortex/gicv3.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.