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CVS commit: src/sys/dev/ic
Module Name: src
Committed By: jdolecek
Date: Mon Nov 19 22:05:23 UTC 2018
Modified Files:
src/sys/dev/ic: ahcisata_core.c
Log Message:
during SRST (softreset), make a short delay between the RST set and
clear; SATA specifies minimum 5 usec for the toggle period, and
some controllers (seems usually on AMD motherboards) actually require it
this fixes the 'clearing WDCTL_RST failed' error in PR kern/53307
and PR kern/53524
confirmed working on a ASUS Prime A320M-K mainboard by me, and by Patrick
Welche on another Ryzen system
XXX pullup-8
To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/ic/ahcisata_core.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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