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CVS commit: src/sys/arch



Module Name:    src
Committed By:   thorpej
Date:           Mon Dec 30 23:32:30 UTC 2019

Modified Files:
        src/sys/arch/amd64/amd64: genassym.cf vector.S
        src/sys/arch/i386/i386: genassym.cf vector.S
        src/sys/arch/x86/include: cpu.h
        src/sys/arch/x86/x86: intr.c

Log Message:
Fix a problem with intr_unmask() that can cause a forever-loop:
- When handling the source-is-masked case in the interrupt vector, set the
  interrupt bit in a new ci_imasked field and ensure the bit is cleared
  from ci_ipending.
- In intr_unmask(), transfer the bit from ci_imasked to ci_ipending for
  non-level-sensitive interrupts (the PIC does the work for us in the
  level-sensitive case), and only force pending interrupts to be processed
  in this case.  (In all cases, make sure the now-unmasked bit is cleared
  from ci_imasked.)

Before, the bit was left in ci_ipending so as not to use edge-triggered
interrupts while the source is masked, but Xspllower() relies on the
pending bits getting cleared.

Tested by forcing all wm(4) interrupts on my test system though an
intr_mask() / softint / intr_unmask() cycle and exercising the network
heavily.


To generate a diff of this commit:
cvs rdiff -u -r1.79 -r1.80 src/sys/arch/amd64/amd64/genassym.cf
cvs rdiff -u -r1.72 -r1.73 src/sys/arch/amd64/amd64/vector.S
cvs rdiff -u -r1.116 -r1.117 src/sys/arch/i386/i386/genassym.cf
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/i386/i386/vector.S
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/x86/include/cpu.h
cvs rdiff -u -r1.149 -r1.150 src/sys/arch/x86/x86/intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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