CVS commit: src/sys/arch/x86/include

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Fri May  1 04:07:24 UTC 2020

Modified Files:
        src/sys/arch/x86/include: specialreg.h

Log Message:
- Add AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC intercept bit.
- Modify comment.


To generate a diff of this commit:
cvs rdiff -u -r1.163 -r1.164 src/sys/arch/x86/include/specialreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.