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CVS commit: src/sys/arch/aarch64/aarch64
Module Name: src
Committed By: riastradh
Date: Mon May 11 14:44:16 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
Log Message:
Add support for the ARMv8.5-RNG CPU random number generator.
We use the RNDRRS system register. I made the following two
wild-arse guesses about the architecture of real implementations,
which might not exist yet:
1. There's only one physical source per CPU package, so not worth
attaching one per core.
2. Like other CPU RNGs -- RDSEED, VIA C3 -- this probably gives about
half a bit of entropy per bit of data (although perhaps we should
say zero and revisit this once it arrives on real silicon).
Tested in qemu as well as I can, using `-cpu max' (which doesn't get
to userland for unrelated reasons).
This uses the numeric notation `mrs %0, s3_3_c2_c4_1' for the rndrrs
system register instead of the more legible `mrs %0, rndrrs' as
suggested in the ARMv8.5 ARM. Why?
- clang doesn't like `mrs %0, rndrrs' for reasons unclear to me.
- gas only likes it with `.arch armv8.5-a+rng', but there's no clear
way to keep that scoped; the `.set push/pop' stack that would be an
obvious choice for this works only on mips.
- gcc supports __attribute__((target("arch=..."))) on functions, but
the version we use doesn't yet know about armv8.5-a+rng.
Later on, we should replace this by a target attribute and the more
obvious `mrs %0, rndrrs' notation.
ok nick
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/aarch64/aarch64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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