CVS commit: src/sys/arch/arm/ti

["Jared D. McNeill" <jmcneill%netbsd.org@localhost>]

Module Name:    src
Committed By:   jmcneill
Date:           Wed Jun  3 19:16:23 UTC 2020

Modified Files:
        src/sys/arch/arm/ti: ti_motg.c

Log Message:
PR# port-evbarm/55263: BeagleBone Black too many interrupts on CPU when
using 5V DC power cable

Handle vbus status change events, and don't busy spin in the hard intr
handler when we see a vbus error (this will always be set when VBUS is not
present).


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/ti/ti_motg.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.