CVS commit: src/sys/arch/mips/include

["Simon Burge" <simonb%netbsd.org@localhost>]

Module Name:    src
Committed By:   simonb
Date:           Sun Jun 14 08:43:08 UTC 2020

Modified Files:
        src/sys/arch/mips/include: cache_octeon.h

Log Message:
Define Octeon Cavium cache layouts for various cnMIPS cores.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/include/cache_octeon.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.