CVS commit: src/sys/arch/powerpc

["Rin Okuyama" <rin%netbsd.org@localhost>]

Module Name:    src
Committed By:   rin
Date:           Wed Jul 15 09:10:14 UTC 2020

Modified Files:
        src/sys/arch/powerpc/booke: trap.c
        src/sys/arch/powerpc/ibm4xx: trap.c

Log Message:
For booke and ibm4xx, emulate m[ft]msr in user mode, in the same
manner as oea.

Now, user process can decide by itself whether floating-point
exception triggers SIGFPE or not via fenv(3).


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/powerpc/booke/trap.c
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/powerpc/ibm4xx/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.