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CVS commit: src/sys/arch/mips
Module Name: src
Committed By: jmcneill
Date: Fri Jul 17 21:59:30 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c octeon_intr.c octeonvar.h
src/sys/arch/mips/cavium/dev: octeon_ciureg.h
src/sys/arch/mips/mips: cpu_subr.c
Log Message:
Remove 2 CPU limit in OCTEON interrupt controller driver.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/cavium/octeon_cpunode.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/mips/cavium/octeon_intr.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/mips/cavium/octeonvar.h
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/mips/cavium/dev/octeon_ciureg.h
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/mips/mips/cpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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