CVS commit: src/sys/arch/mips/mips

["Simon Burge" <simonb%netbsd.org@localhost>]

Module Name:    src
Committed By:   simonb
Date:           Fri Jul 31 08:06:33 UTC 2020

Modified Files:
        src/sys/arch/mips/mips: mips_machdep.c

Log Message:
Fix TLB count probe on MIPS32R2+/MIPS64R2+ for CPUs that have a Config4
register with a Config4[MMUExtDef] value.


To generate a diff of this commit:
cvs rdiff -u -r1.297 -r1.298 src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.