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CVS commit: src/sys/arch/aarch64/include
Module Name: src
Committed By: maxv
Date: Sat Aug 1 08:47:05 UTC 2020
Modified Files:
src/sys/arch/aarch64/include: armreg.h
Log Message:
The system registers we modify can have an impact on memory accesses, and
we don't want the compiler to randomly re-order the instructions, so add
barriers. Same as WRMSR on x86.
To generate a diff of this commit:
cvs rdiff -u -r1.50 -r1.51 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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