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CVS commit: src/sys/arch/mips/include



Module Name:    src
Committed By:   simonb
Date:           Sun Aug  2 23:20:25 UTC 2020

Modified Files:
        src/sys/arch/mips/include: mipsNN.h

Log Message:
Document the PerfCntCrl registers (CP0 Register 25, Selects 0, 2, 4, 6).


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/mips/include/mipsNN.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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