CVS commit: src/sys/arch/mips/cavium

["Simon Burge" <simonb%netbsd.org@localhost>]

Module Name:    src
Committed By:   simonb
Date:           Wed Aug  5 04:19:11 UTC 2020

Modified Files:
        src/sys/arch/mips/cavium: octeon_intr.c

Log Message:
Target all device interrupts to cpu0.

Patch from skrll@.  Code is conditional, hopefully not needed long term.


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/mips/cavium/octeon_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.