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CVS commit: src/sys/arch/alpha/alpha
Module Name: src
Committed By: thorpej
Date: Sat Sep 19 01:32:16 UTC 2020
Modified Files:
src/sys/arch/alpha/alpha: locore.s
Log Message:
- The Alpha fast-soft-intrs implementation supports 2 soft interrupt levels,
so in exception_return() ensure we clear ineligible-at-new-IPL softint
bits from the SSIR, otherwise we could loop forever in the following
scenario:
processing softnet -> clock interrupt -> schedule softclock
- If the softint thread blocks, it's possible to bounce back through
the softint return trampoline at something other than IPL_HIGH. This
is not a problem other than it's contrary to what alpha_softint_dispatch()
expect, so make alpha_softint_return() go to IPL_HIGH before it does
anything else.
These two fixes make fast-soft-interrupts work on Alpha.
To generate a diff of this commit:
cvs rdiff -u -r1.135 -r1.136 src/sys/arch/alpha/alpha/locore.s
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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