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CVS commit: src/tests/lib/libc/sys



Module Name:    src
Committed By:   rin
Date:           Thu Oct 15 22:59:50 UTC 2020

Modified Files:
        src/tests/lib/libc/sys: t_ptrace_core_wait.h

Log Message:
Apply fix in rev 1.2 for core_dump_procinfo to aarch64 and arm:

http://cvsweb.netbsd.org/bsdweb.cgi/src/tests/lib/libc/sys/t_ptrace_core_wait.h#rev1.2

> For powerpc, program counter is not automatically incremented by trap
> instruction. We cannot increment PC in the trap handler, which breaks
> applications depending on this behavior, e.g., GDB.

This statement is true for aarch64 and arm.

Also, use PTRACE_BREAKPOINT_SIZE instead of hard-coded 4 to address
instruction next to PC.

OK ryo


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/tests/lib/libc/sys/t_ptrace_core_wait.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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