CVS commit: src/sys/arch

["Jared D. McNeill" <jmcneill%netbsd.org@localhost>]

Module Name:    src
Committed By:   jmcneill
Date:           Sat Sep 18 12:25:07 UTC 2021

Modified Files:
        src/sys/arch/aarch64/aarch64: genassym.cf vectors.S
        src/sys/arch/aarch64/include: cpu.h
        src/sys/arch/arm/cortex: gic_splfuncs.c
        src/sys/arch/evbarm/conf: std.generic64

Log Message:
gic_splx: performance optimizations

Avoid any kind of register access (DAIF, PMR, etc), barriers, and atomic
operations in the common case where no interrupt fires between spl being
raised and lowered.

This introduces a per-CPU return address (ci_splx_restart) used by the
vector handler to restart a sequence in splx that compares the new ipl
with the per-CPU hardware priority state stored in ci_hwpl.


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/aarch64/aarch64/vectors.S
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/include/cpu.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/cortex/gic_splfuncs.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/evbarm/conf/std.generic64

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.