CVS commit: src/sys/arch/mips/mips

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Sat Nov  6 06:49:02 UTC 2021

Modified Files:
        src/sys/arch/mips/mips: cache_tx39.c

Log Message:
Fix typo in comment. s/phyiscally/physically/


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/mips/cache_tx39.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.