CVS commit: src/sys/dev/mii

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Tue Dec 28 06:34:40 UTC 2021

Modified Files:
        src/sys/dev/mii: makphy.c

Log Message:
QEMU e1000's PHY code doesn't implement page 0 register 15. Do workaround.

 - The BMSR register bit 8 (BMSR_EXTSTAT) denote the existence of page 0
   register 15. qemu's e1000 sets BMSR_EXTSTAT but the access to register 15
   fails. It doesn't conforms to the IEEE standard. Our makphy automatically
   check the existence of 1000BASE-T or 1000BASE-SX by accessing the register
   15. If the access failed, neither 1000BASE-T nor 1000BASE-SX is set to
   the ability(mii_extcapabilities). Set EXTSR_1000TFDX and EXTSR_1000THDX
   if the access failed in the attach function. It's just a cosmetic change.
   It's not affected to the packet processing.


To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/dev/mii/makphy.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.