CVS commit: src/sys/arch/hppa

["Michael Lorenz" <macallan%netbsd.org@localhost>]

Module Name:    src
Committed By:   macallan
Date:           Sat Feb 26 03:02:25 UTC 2022

Modified Files:
        src/sys/arch/hppa/hppa: intr.c
        src/sys/arch/hppa/include: intr.h

Log Message:
unmask interrupt bits leading to other interrupt registers
now hardware interrupts actually fire instead of being found pending by the
timer interrupt
with this SCSI throughput on my c360 is what you'd expect from an UW esiop


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/hppa/hppa/intr.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/hppa/include/intr.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.