Source-Changes archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

CVS commit: src/sys/arch/mips/include



Module Name:    src
Committed By:   riastradh
Date:           Sun Feb 27 19:22:12 UTC 2022

Modified Files:
        src/sys/arch/mips/include: asm.h

Log Message:
mips: Redefine BDSYNC as sync on Octeon, not syncw.

BDSYNC is used for membar_sync, which is supposed to be a full
sequential consistency barrier, which is not provided by syncw, so
this is necessary for correctness.

BDSYNC is not used for anything else, so this can't hurt performance,
except where it was necessary for correctness anyway or where the
semantic choice of membar_sync was too strong anyway.


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/mips/include/asm.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




Home | Main Index | Thread Index | Old Index