Source-Changes archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
CVS commit: src/sys/arch/riscv
Module Name: src
Committed By: jmcneill
Date: Fri Nov 25 12:35:45 UTC 2022
Modified Files:
src/sys/arch/riscv/conf: GENERIC
Added Files:
src/sys/arch/riscv/sifive: files.sifive fu540_prci.c
Log Message:
Add driver for SiFive FU540 PRCI clock controller.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/riscv/conf/GENERIC
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/sifive/files.sifive \
src/sys/arch/riscv/sifive/fu540_prci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Home |
Main Index |
Thread Index |
Old Index