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CVS commit: src/sys/arch



Module Name:    src
Committed By:   riastradh
Date:           Thu Feb 23 14:56:00 UTC 2023

Modified Files:
        src/sys/arch/evbmips/ingenic: cpu_startup.S
        src/sys/arch/mips/include: asm.h
        src/sys/arch/mips/mips: locore.S locore_mips3.S

Log Message:
mips: Add missing barriers in cpu_switchto.

Details in comments.

PR kern/57240

XXX pullup-8
XXX pullup-9
XXX pullup-10


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbmips/ingenic/cpu_startup.S
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/mips/include/asm.h
cvs rdiff -u -r1.228 -r1.229 src/sys/arch/mips/mips/locore.S
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/mips/mips/locore_mips3.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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