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CVS commit: src/sys/arch/x86/x86
Module Name: src
Committed By: mrg
Date: Mon Feb 19 09:22:31 UTC 2024
Modified Files:
src/sys/arch/x86/x86: tsc.c
Log Message:
make TSC get a quality of -100 on AMD Family 15h and 16h
this should "fix" PR#56322 and is known as AMD errata
"778: Processor Core Time Stamp Counters May Experience Drift"
To generate a diff of this commit:
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/x86/x86/tsc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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