CVS commit: src/sys/arch/riscv

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Thu May  2 18:18:17 UTC 2024

Modified Files:
        src/sys/arch/riscv/include: locore.h
        src/sys/arch/riscv/riscv: cpu_switch.S trap.c

Log Message:
risc-v: fix the error code when uvm_fault fails with cpu_set_onfault

Return the error from uvm_fault instead of EFAULT unconditionally when
faulting with cpu_set_onfault to fix several atf tests.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/include/locore.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/cpu_switch.S
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/riscv/riscv/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.