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CVS commit: src/tests/kernel
Module Name: src
Committed By: riastradh
Date: Tue May 14 15:54:16 UTC 2024
Modified Files:
src/tests/kernel: h_segv.c
Log Message:
tests/kernel/h_segv: Disable SIGFPE test on RISC-V.
No floating-point exception traps on RISC-V.
Also don't pass the result of divide-by-zero converted to integer to
usleep. Although the floating-point result of divide-by-zero is
well-defined by IEEE 754 (+/-infinity), the outcome of C conversion
to integer is not. And while on some architectures this might return
zero, on RISC-V it looks like it'll return all bits set. And as of
PR 58184, usleep now honours sleeps longer than 1sec, which means
this will be waiting at least two billion microseconds, or about half
an hour...
So instead, just write the result to a volatile variable.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/tests/kernel/h_segv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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