CVS commit: src/lib/libm/arch/riscv

["Taylor R Campbell" <riastradh%netbsd.org@localhost>]

Module Name:    src
Committed By:   riastradh
Date:           Fri May 17 02:11:07 UTC 2024

Modified Files:
        src/lib/libm/arch/riscv: fenv.c

Log Message:
riscv: Make feraiseexcept actually raise the given exceptions.

Doing

        fexcept_t ex = 0;
        fesetexceptflag(&ex, excepts);

has the effect of _clearing_ all the exceptions in excepts.  Using
fesetexceptflag doesn't make this easier, because we would have to
record which exceptions were already raised.  So just set the fflags
bits in the fcsr register directly.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/lib/libm/arch/riscv/fenv.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.