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CVS commit: src/sys/arch/x86/x86
Module Name: src
Committed By: gutteridge
Date: Mon Jul 15 01:57:23 UTC 2024
Modified Files:
src/sys/arch/x86/x86: coretemp.c
Log Message:
coretemp.c: drop redundant condition (NFCI)
Checking for a processor model upper limit has no point inside a block
that is already limited further. Noted from code inspection by Sotiris
Lamprinidis in PR kern/58372.
While here, also update to a cached version of an URL for processor
references, as both original URLs have now been removed by Intel.
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/x86/x86/coretemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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