Re: Memory alignment

[Jason Thorpe <thorpej%shagadelic.org@localhost>]

On Dec 4, 2009, at 7:32 AM, Manuel Bouyer wrote:

> Even worse, Xeons have 64 bytes lines but do
> adjacent lines prefetches, so I suspect for this kind of optimisation,
> the right value to consider is 128 bytes.

Someone should check if the extra prefetch in this case is truly speculative: 
i.e., if another CPU has the cache line locked, don't wait for it.

-- thorpej