On Mar 11, 12:44pm, Niklas Hallqvist wrote:
> suppose a0 contains $6000, which is paged out.
> 
> bftst a0@(1){#0:#24} accesses at $6001 but is still on the same
> page that $6002 and $6003
> 
> This causes a pagefault and succeeds normally.  However if the
> next instruction (and the page does not get paged out immediately)
> is:
> 
> movel a0@,d0
> 
> d0 will have the high word ($6000-$6001) mutated, with no correlation
> whatsoever to what's in $6000.  The word can often be found in part
> of another stochastic register, thus leading me to think that the
> words been recently fetched and left erroneously in some cache
> on the card (the in-CPU cache isn't the problem, I've tried both
> with and without it).
> 
> Weird, hah...

  Very!

  Does this do the same thing if you try to access data from somewhere
else in the page (i.e. have a0 be something like $6110).

  Does anyone know how the GVP accesses 16 bit memory from the 68030?
The 68030 has the dynamic bus sizeing, which could be used when accessing
16 bit memory and let the 68030 do the appropriate memory cycles.  If
dynamic bus sizeing isn't used, then the interface logic between the
68030 and the 16 bit memory would need to make two 16 bit fetches from
memory, then present the 32 bit data to the 68030.  This very well could
result in a corrupted transfer when related to a page fault.  I'm not
very familiar with the 68030, so I'm not sure exactly how the 68030
is going to do the memory access for the bit field instruction.  I did
see that the 68030 apparently has a 3-byte transfer size - I wonder if
the 3-byte fetch done by the example bftst would use a 3-byte transfer
size.

Michael

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