On Jan 30, 10:55am, Niklas Hallqvist wrote:
> Subject: Re: Retina console problems
> BTW, I skimmed through ite_rt.c esp. screen_up, and it seems that it
> is the NCR chip that does the scrolling.  This means you're not out of
> luck, if you cannot get the things to work using this method, There's
> always the option of letting the CPU take care of it.  It *is* strange
> that you should just see this on an 040 system.  Perhaps your kernel
> sets up the cache info wrong wrt the retina buffer.  I really don't
> know.  Perhaps you should try a current kernel as well, the zbus setup
> has changed slightly, although I don't think it will help you.
 
 Maybe this is similar to the problem I have with the Picasso in Z2-
machines equipped with 040. Some of the registers are not correctly
addressed by the 040 due to the Zorro-to-ISA (or VESA) convertion.

 The little/big endian problem strikes for the palette registers in
the Picasso - maybe this is the case for other registers in the Retina?


-- 
Markus Illenseer