hi,

I just got such a board and tried to use it on a i386 running
-current. As the PCI-ID of this board isn't listed in /sys/dev/pci/pcidevs 
and the driver doesn't recognize this card, it's not usable at the moment.
Here's the pci configuration info:

Cyclades product 0x0105 (miscellaneous communications, revision 0x01) at pci0 dev 20 function 0: PCI configuration registers:
  Common header:
    0x00: 0x0105120e 0x02800003 0x07800001 0x00000008

    Vendor Name: Cyclades (0x120e)
    Device ID: 0x0105
    Command register: 0x0003
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0280
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: communications (0x07)
    Subclass Name: miscellaneous (0x80)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x08

  Type 0 ("normal" device) header:
    0x10: 0xef10d000 0x0000e801 0xef108000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x0100120e
    0x30: 0x00000000 0x00000000 0x00000000 0x0000010a

    Base address register at 0x10
      type: 32-bit noncacheable memory
      base: 0xef10d000, size: 0x00000080
    Base address register at 0x14
      type: i/o
      base: 0x0000e800, size: 0x00000080
    Base address register at 0x18
      type: 32-bit noncacheable memory
      base: 0xef108000, size: 0x00004000
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x120e
    Subsystem ID: 0x0100
    Expansion ROM Base Address: 0x00000000
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0a

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.
Cyclades product 0x0105 (miscellaneous communications, revision 0x01) at pci0 dev 20 function 0 (tag 0x8000a000, intrtag 0x8000a000, intrswiz 0, intrpin 0x1, io on, mem on, no quirks) not configured

what can I do get this "singing and dancing" ;-)?

     -kurt