Subject: Re: vaio and cardbus
To: None <wolfgang@wsrcc.com>
From: Hayakawa Koichi <haya@arch.sony.co.jp>
List: current-users
Date: 12/17/1999 10:04:48
Hi,

From: Wolfgang Rupprecht <wolfgang@wsrcc.com>
Subject: Re: vaio and cardbus
Date: 16 Dec 1999 09:54:48 -0800
Message-ID: <x7so12rct3.fsf@capsicum.wsrcc.com>

 > There are still some rough edges, but the 100BaseTX comes up and moves
 > bits like a bat out of hell.  Moving those 650Meg CDROM images to the
 > laptop is certainly going to be much more pleasant now.
 > 
 > One small bug worth noting is that I can no-longer use the etherlink
 > (ep0) card with the cardbus kernel.  Two copies of the same etherlink
 > card are found and assigned ep0 and ep1.  The resulting mess leaves
 > both the ep0 and ep1 "image" wedged.

Would you apply this patch attached below?  This patch will
avoid ghost device.
-- 
*** sys/dev/pci/pccbb.c	Mon Nov 22 14:19:11 1999
--- sys/dev/pci/pccbb.c	Fri Dec 17 09:54:38 1999
***************
*** 523,529 ****
  			 0, /* address: I don't mind where it is mapped */
  			 0x1000, /* size */
  			 0x0fff, /* mask */
! 			 0x1000, /* align */
  			 0, /* flags */
  			 &sockbase, &sc->sc_base_memh)) {
        return;
--- 523,529 ----
  			 0, /* address: I don't mind where it is mapped */
  			 0x1000, /* size */
  			 0x0fff, /* mask */
! 			 (sc->sc_chipset == CB_RX5C47X || sc->sc_chipset == CB_TI113X) ? 0x10000 : 0x1000, /* align */
  			 0, /* flags */
  			 &sockbase, &sc->sc_base_memh)) {
        return;
***************
*** 700,706 ****
--- 700,708 ----
  
    switch (sc->sc_chipset) {
    case CB_RX5C46X:		/* fallthrogh */
+ #if 0
    case CB_RX5C47X:
+ #endif
      /*
       * The legacy pcic io-port on Ricoh CardBus bridges cannot be
       * disabled by substituting 0 into PCI_LEGACY register.  Ricoh
***************
*** 1278,1293 ****
  cb_reset(sc)
       struct pccbb_softc *sc;
  {
    u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
    bcr |= (0x40 << 16);		/* Reset bit Assert (bit 6 at 0x3E) */
    pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
!   /* Reset Assert at least 20 ms */
!   delay(20*1000);
  
    if (CBB_CARDEXIST & sc->sc_flags) { /* A card exists.  Reset it! */
      bcr &= ~(0x40 << 16);	/* Reset bit Deassert (bit 6 at 0x3E) */
      pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
!     delay(20*1000);
    }
  				/* No card found on the slot. Keep Reset. */
    return 1;
--- 1280,1300 ----
  cb_reset(sc)
       struct pccbb_softc *sc;
  {
+   /*
+    * Reset Assert at least 20 ms 
+    * Some machines request longer duration.
+    */
+   int reset_duration = (sc->sc_chipset == CB_RX5C47X ? 400*1000 : 40*1000);
    u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
+ 
    bcr |= (0x40 << 16);		/* Reset bit Assert (bit 6 at 0x3E) */
    pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
!   delay(reset_duration);
  
    if (CBB_CARDEXIST & sc->sc_flags) { /* A card exists.  Reset it! */
      bcr &= ~(0x40 << 16);	/* Reset bit Deassert (bit 6 at 0x3E) */
      pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
!     delay(reset_duration);
    }
  				/* No card found on the slot. Keep Reset. */
    return 1;
--