On Saturday 17 March 2007, Juan RP wrote:
> Hi,
>
> I'm posting patches for review and test. The patches do:

I fixed two things that were wrong right now:

* I was increasing atomically the counter in curcpu() two times, before
  x86_broadcast_ipi().
* After a write with msr_cpu_broadcast_write(), ci->ci_msr_rvalue was not
  updated with the new value, so it always had previous value.

A NetBSD user tested it for me with Enhanced Speedstep, and I tested it
with p4tcc, I can't see any problem and the value is read or written in all 
CPUs correctly.

http://www.netbsd.org/~xtraeme/msr_ipi_handlers.diff
http://www.netbsd.org/~xtraeme/est_smp.diff
http://www.netbsd.org/~xtraeme/powernow_k8_smp.diff

Are there any problems with this code now?

Debugging output doesn't lie:

msr_cpu_broadcast_write: mcb->msr_value=30

msr_cpu_broadcast: ---- START ----
msr_cpu_broadcast: before write
msr_write_ipi: (cpu0) before write
msr_write_ipi: (cpu0) after write
msr_read_ipi: (cpu0) before read
msr_write_ipi: (cpu1) before write
msr_read_ipi: (cpu0) after read
msr_write_ipi: (cpu1) after write
msr_cpu_broadcast: after write
msr_read_ipi: (cpu1) before read
msr_cpu_broadcast: before pause
msr_read_ipi: (cpu1) after read
msr_cpu_broadcast: x86_msr_runcount=4 ncpu=2
msr_cpu_broadcast: after pause
cpu0: ci_msr_rvalue=0x30
cpu1: ci_msr_rvalue=0x30
msr_cpu_broadcast: ----- END -----

x86_msr_runcount is 4 because my system has two CPUs and a write operation 
(msr_cpu_broadcast_write()), issues two operations (write and read):

counter = 0

write op (curcpu): counter++
write op (x86_broadcast_ipi): counter++
read op (curcpu): counter++
read op (x86_broadcast_ipi): counter++

counter = 4

-- 

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