On Sat, 30 Jun 2007, Juan RP wrote:

>> Now, the files are patched, but CPUVENDOR_VIA is undefined in
>> identcpu.c
>>
>> I supose CPUVENDOR_VIA is needed in arch/x86/include/cputypes.h
>>
>> /*
>>   * CPU vendors
>>   */
>>
>> #define CPUVENDOR_UNKNOWN       -1
>> #define CPUVENDOR_INTEL         0
>> #define CPUVENDOR_CYRIX         1
>> #define CPUVENDOR_NEXGEN        2
>> #define CPUVENDOR_AMD           3
>> #define CPUVENDOR_IDT           4
>> #define CPUVENDOR_TRANSMETA     5
>>
> Try adding:
>
> #define CPUVENDOR_VIA 8
>
> Let me know if that works and I'll commit.

Juan: thanks for your help.

I am having some difficults in order to test your patch:

1) The cpu_vendor variable used for "C7 Esther" family is 0x4
2) The following lines of your code: (end of identcpu.c)

                 if (rdmsr(MSR_MISC_ENABLE) & (1 << 16)) {
                         if (cpu_vendor == CPUVENDOR_INTEL)
                                 est_init(CPUVENDOR_INTEL);
                         if (cpu_vendor == CPUVENDOR_VIA)
                                 est_init(CPUVENDOR_VIA);

if I have previous initialized ACE, rdmsr returns 0x100400,
if not, then rdmsr returns 0x110400 and I got the message:
cpu0: unknown Enhanced SpeedStep CPU

3) To initialize ACE (function via_cpu_probe() in identcpu.c)
the functions rdmsr() and wrmsr() are used:

               msr = rdmsr(MSR_VIA_ACE);
               wrmsr(MSR_VIA_ACE, msr | MSR_VIA_ACE_ENABLE);

at this point, msr receives the value "0x9f1f1ac5"
these value seems very very rare (for me).

maybe this number is my problem.

Thanks again, Juan

Heron Gallegos
Saltillo Coahuila Mexico