Re: root on sd0a on odroid-c1

To: Nick Hudson <skrll%netbsd.org@localhost>
Subject: Re: root on sd0a on odroid-c1
From: Andrew Cagney <andrew.cagney%gmail.com@localhost>
Date: Sun, 28 Feb 2016 20:15:55 -0500
On 25 February 2016 at 09:47, Nick Hudson <skrll%netbsd.org@localhost> wrote:
> On 02/25/16 14:34, Andrew Cagney wrote:
>>
>> On 22 February 2016 at 12:46, Andrew Cagney <andrew.cagney%gmail.com@localhost>
>> wrote:
>>>
>>> On 20 February 2016 at 17:14, Michael van Elst <mlelstv%serpens.de@localhost>
>>> wrote:
>>>>
>>>> andrew.cagney%gmail.com@localhost (Andrew Cagney) writes:
>>>>
>>>>> so I simply added root=sd0a to /boot/boot.ini's boot line.  That
>>>>> resulted in:
>>>>
>>>> [...]
>>>>>
>>>>> use one of: awge0 ld0[a-p] ddb halt reboot
>>>>> Should this have worked?
>
>
> Can you post a full dmesg?

see below...

> As Michael says the usb explore code doesn't wait properly here. There was
> code, but it's bit rotted.
>
>
>> Just FYI,
>>
>> Tried a similar configuration on the Pi (i.e., same physical disk, but
>> did add ta powered USB hub), and it's working fine.  Hmm, perhaps it
>> is a power issue.
>
>
> Maybe.

It turns out this was beginners luck.  The pi also, occasionally,
can't see sd0 early in the boot process.


>>
>> Andrew
>>
>>>>> However, I get the feeling that there's more going on.  For instance,
>>>>> just adding an entry to /etc/fstab to mount of /dev/sd0a on /mnt fails
>>>>> during boot (fsck can't access /dev/rsd0a during the boot).  Yet once
>>>>> the system is booted it works fine.
>>>>
>>>> The USB disk is probably starting too slowly to be recognized at this
>>>> point. There needs to be some kind of spin-up delay in the kernel to
>>>> handle this situation.
>
>
> There used to be one as mentioned above.
>
> Can you try -current as of today - I made a change to dwctwo(4) this morning
> that *might* help here.
>
> Nick

����QA5:A;SVN:B72;POC:17F;STS:0;BOOT:0;INIT:10;BOOT:1;INIT:0;READ:0;CHECK:0;PASS:1;
-----------------------------------------------------------------------
* Welcome to Hardkernel's ODROID-C... (Built at 19:33:00 Dec  8 2014) *
-----------------------------------------------------------------------
CPU : AMLogic S805
MEM : 1024MB (DDR3@792MHz)
BID : HKC1310001
S/N : HKC11122F37DF98C
0x0000009f
check SD_boot_type:0x1 card_type:0x1
Loading U-boot...success.


U-boot(odroidc@) (Mar 08 2015 - 11:08:17)

DRAM:  1 GiB
relocation Offset is: 2ff1c000
MMC:   SDCARD: 0, eMMC: 1
IR init is done!
*** Warning - bad CRC, using default environment

mmc save env ok
vpu clk_level = 3
set vpu clk: 182150000Hz, readback: 182150000Hz(0x701)
mode = 6  vic = 4
set HDMI vic: 4
mode is: 6
viu chan = 1
config HPLL
config HPLL done
reconfig packet setting done
MMC read: dev # 0, block # 33984, count 12288 ... 12288 blocks read: OK
There is no valid bmp file at the given address
============================================================
Vendor: Man 1a5051 Snr 033000ad Rev: 0.0 Prod: SD
            Type: Removable Hard Disk
            Capacity: 30750.0 MB = 30.0 GB (62976000 x 512)
------------------------------------------------------------
Partition     Start Sector     Num Sectors     Type
    1      8192    122880 c
    2    393216   2142464 a9
============================================================
Net:   Meson_Ethernet
init suspend firmware done. (ret:0)
Hit Enter key to stop autoboot -- :  1  0
exit abortboot: 0
reading boot.ini

173 bytes read
Loading boot.ini from mmc0:1 (vfat)
Executing the script...
setenv bootargs "root=sd0a awge0.mac-address=${ethaddr}"
setenv bootcmd "fatload mmc 0:1 0x21000000 netbsd-ODROID-C1.ub; bootm
0x21000000"
run bootcmd
reading netbsd-ODROID-C1.ub

6031432 bytes read
## Booting kernel from Legacy Image at 21000000 ...
   Image Name:   NetBSD/amlogic 7.99.26
   Image Type:   ARM NetBSD Kernel Image (uncompressed)
   Data Size:    6031368 Bytes = 5.8 MiB
   Load Address: 00100000
   Entry Point:  00100000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK
uboot time: 5316626 us.
## Transferring control to NetBSD stage-2 loader (at address 00100000) ...
[ Kernel symbol table missing! ]
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 7.99.26 (ODROID-C1) #1: Fri Feb 26 11:00:27 EST 2016
cagney@morgan:/home/cagney/NetBSD/trunk/evbearmv7hf-el/sys/arch/evbarm/compile/ODROID-C1
total memory = 1024 MB
avail memory = 1007 MB
sysctl_createv: sysctl_create(machine_arch) returned 17
mainbus0 (root)
cpu0 at mainbus0 core 0: 1536 MHz Cortex-A5 r0p1 (Cortex V7A core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB/32B 2-way L1 VIPT Instruction cache
cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
cpu0: 512KB/32B 8-way write-back L2 PIPT Unified cache
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu1 at mainbus0 core 1
cpu2 at mainbus0 core 2
cpu3 at mainbus0 core 3
armperiph0 at mainbus0
armgic0 at armperiph0: Generic Interrupt Controller, 256 sources (245 valid)
armgic0: 32 Priorities, 224 SPIs, 5 PPIs, 16 SGIs
a9tmr0 at armperiph0: A5 Global 64-bit Timer (384 MHz)
a9tmr0: interrupting on irq 27
a9wdt0 at armperiph0: A5 Watchdog Timer, default period is 12 seconds
arml2cc0 at armperiph0: ARM PL310 r3p3 L2 Cache Controller (disabled)
arml2cc0: cache enabled
amlogicio0 at mainbus0
amlogiccom0 at amlogicio0 port 0: console
amlogiccom0: interrupting at irq 122
amlogicgpio0 at amlogicio0: GPIO controller
gpio0 at amlogicgpio0 (GPIOX): 22 pins
gpio1 at amlogicgpio0 (GPIOY): 15 pins
gpio2 at amlogicgpio0 (GPIODV): 30 pins
gpio3 at amlogicgpio0 (GPIOH): 6 pins
gpio4 at amlogicgpio0 (GPIOAO): 14 pins
gpio5 at amlogicgpio0 (BOOT): 19 pins
gpio6 at amlogicgpio0 (CARD): 7 pins
genfb0 at amlogicio0
wsdisplay0 at genfb0 kbdmux 1
amlogicrng0 at amlogicio0
dwctwo0 at amlogicio0 port 0: USB controller
dwctwo1 at amlogicio0 port 1: USB controller
awge0 at amlogicio0: Gigabit Ethernet Controller
awge0: interrupting on irq 40
awge0: Ethernet address: 00:1e:06:10:1d:0c
rgephy0 at awge0 phy 0: RTL8169S/8110S/8211 1000BASE-T media interface, rev. 6
rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
rgephy1 at awge0 phy 1: RTL8169S/8110S/8211 1000BASE-T media interface, rev. 6
rgephy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
amlogicsdio0 at amlogicio0: SDIO controller (port C)
amlogicsdio0: interrupting on irq 60
amlogicsdhc0 at amlogicio0: SDHC controller (port B)
amlogicsdhc0: interrupting on irq 110
amlogicrtc0 at amlogicio0: RTC
usb0 at dwctwo0: USB revision 2.0
usb1 at dwctwo1: USB revision 2.0
cpu3: 1536 MHz Cortex-A5 r0p1 (Cortex V7A core)
cpu3: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu3: 32KB/32B 2-way L1 VIPT Instruction cache
cpu3: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
cpu3: 512KB/32B 8-way write-back L2 PIPT Unified cache
vfp3 at cpu3: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu2: 1536 MHz Cortex-A5 r0p1 (Cortex V7A core)
cpu2: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu2: 32KB/32B 2-way L1 VIPT Instruction cache
cpu2: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
cpu2: 512KB/32B 8-way write-back L2 PIPT Unified cache
vfp2 at cpu2: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu1: 1536 MHz Cortex-A5 r0p1 (Cortex V7A core)
cpu1: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu1: 32KB/32B 2-way L1 VIPT Instruction cache
cpu1: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
cpu1: 512KB/32B 8-way write-back L2 PIPT Unified cache
vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
sdmmc1 at amlogicsdio0
sdmmc0 at amlogicsdhc0
uhub0 at usb1: vendor 0000 DWC2 root hub, class 9/0, rev 2.00/1.00, addr 1
uhub1 at usb0: vendor 0000 DWC2 root hub, class 9/0, rev 2.00/1.00, addr 1
ld0 at sdmmc0: <0x1a:0x5051:SD   :0x00:0x033000ad:0x0c3>
ld0: 30750 MB, 7809 cyl, 128 head, 63 sec, 512 bytes/sect x 62976000 sectors
ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz
uhub2 at uhub0 port 1: vendor 05e3 USB2.0 Hub, class 9/0, rev 2.00/32.98, addr 2
uhub2: multiple transaction translators
uhidev0 at uhub2 port 3 configuration 1 interface 0
uhidev0: Logitech USB Receiver, rev 2.00/12.01, addr 3, iclass 3/1
ukbd0 at uhidev0: 8 modifier keys, 6 key codes
wskbd0 at ukbd0 mux 1
uhidev1 at uhub2 port 3 configuration 1 interface 1
uhidev1: Logitech USB Receiver, rev 2.00/12.01, addr 3, iclass 3/1
uhidev1: 8 report ids
ums0 at uhidev1 reportid 2: 16 buttons, W and Z dirs
wsmouse0 at ums0 mux 0
uhid0 at uhidev1 reportid 3: input=4, output=0, feature=0
uhid1 at uhidev1 reportid 4: input=1, output=0, feature=0
uhid2 at uhidev1 reportid 8: input=1, output=0, feature=0
uhidev2 at uhub2 port 3 configuration 1 interface 2
uhidev2: Logitech USB Receiver, rev 2.00/12.01, addr 3, iclass 3/0
uhidev2: 33 report ids
uhid3 at uhidev2 reportid 16: input=6, output=6, feature=0
uhid4 at uhidev2 reportid 17: input=19, output=19, feature=0
uhid5 at uhidev2 reportid 32: input=14, output=14, feature=0
uhid6 at uhidev2 reportid 33: input=31, output=31, feature=0
sdmmc1: sdmmc_mem_enable failed with error 60
sdmmc1: couldn't enable card: 60
boot device: <unknown>
unknown device major 0xffffffffffffffff
root device: ��
Follow-Ups:
- Re: root on sd0a on odroid-c1
  - From: Michael van Elst
References:
- root on sd0a on odroid-c1
  - From: Andrew Cagney
- Re: root on sd0a on odroid-c1
  - From: Michael van Elst
- Re: root on sd0a on odroid-c1
  - From: Andrew Cagney
- Re: root on sd0a on odroid-c1
  - From: Andrew Cagney
- Re: root on sd0a on odroid-c1
  - From: Nick Hudson
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