>Number:         2604
>Category:       port-i386
>Synopsis:       supporting advanced pentium architecture functions
>Confidential:   yes
>Severity:       serious
>Priority:       medium
>Responsible:    gnats-admin (GNATS administrator)
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Fri Jul  5 10:35:01 1996
>Last-Modified:
>Originator:     Robert V. Baron
>Organization:
	
>Release:        1.1
>Environment:
	
System: NetBSD strauss.coda.cs.cmu.edu 1.1 NetBSD 1.1 (CCODA) #14: Wed Jun 19 14:56:34 EDT 1996 bnoble@telemann.coda.cs.cmu.edu:/usr1/bnoble/kernel_tree/src/sys/arch/i386/compile/CCODA i386


>Description:
	The arch/i386/include/specialreg.h is missing a bunch of
definitions for architecture/model dependent pentium internals.  I include
these definitions in the "Fix" field below.  Also, you need to upgrade the
asm to include the control register, %cr4, as well as the instructions,
rdtsc, rdmsr and wrmsr.
>How-To-Repeat:
	
>Fix:
	
diff -r1.1.1.2 specialreg.h
56a57,87
> #define       new
> #ifdef        new
> /*
>  * The info below was gleaned from:
>    C) Copyright 1993, 1994 By Harald Feldmann Revision 04, Nov 3rd 1994.
>        Hamarsoft's 86BUGS list, (C)
>    1993/94 By Hamarsoft (R) The 86BUGS list, distributed...
>    http://powderkeg.stanford.edu/~rho/8LIST04.LST - size 106K - 23 Mar 95
> */
> /*
>  * Bits in the EDX register after doing an "cpuid" instruction with %eax == 1
>  */
> #define       ID1_FPU 0x01    /* has builtin fpu */
> #define       ID1_V86 0x02    /* has v86 extensions */
> #define       ID1_IOB 0x04    /* has io breakpoints */
> #define       ID1_4MB 0x08    /* has 4Meg pages */
> #define       ID1_TSC 0x10    /* has TSC */
> #define       ID1_MSR 0x20    /* has "Model Specific Registers" */
> #define       ID1_MCE 0x80    /* has Machine Check Exceptions */
> 
> /*
>  * We also need bits in cr4 (??)
>  */
> #define       CR4_MCE 0x40    /* enable machine check */
> #define       CR4_4MB 0x10    /* enable 4MB pages */
> #define       CR4_IOB 0x08    /* enable io breakpoints (value is 0x02 [reserved])
> #define       CR4_TSC 0x04    /* disable user RDTSC */
> #define       CR4_PVI 0x02    /* enable virt intr in protected mode */
> #define       CR4_VVI 0x01    /* enable virt intr in v86 mode */
> #endif
> #undef        new

>Audit-Trail:
>Unformatted: