>Number:         9059
>Category:       port-sparc
>Synopsis:       Sparc 10 fails to boot waiting for the 2 seconds for the devices to settle.
>Confidential:   no
>Severity:       critical
>Priority:       high
>Responsible:    port-sparc-maintainer (NetBSD/sparc Portmaster)
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Sun Dec 26 19:27:00 1999
>Last-Modified:
>Originator:     Christos Zoulas
>Organization:
	not a lot
>Release:        19991226
>Environment:
System: NetBSD hrothgar.gw.com 1.3H NetBSD 1.3H (TAC-GENERIC) #2: Sun Nov 1 14:11:13 EST 1998 kim@hrothgar.gw.com:/net/hrothgar/src-1/NetBSD/cvsroot/src/sys/arch/i386/compile/TAC-GENERIC i386


>Description:

Sparc 10 fails to boot waiting for the 2 seconds for the devices to settle.

Rebooting with command: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@3,0:d
Boot device: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@3,0:d   File and args: 
>How-To-Repeat:
	Compile a kernel and try to boot.
>Fix:
	Don't know
>Audit-Trail:
>Unformatted:
>> NetBSD/sparc Secondary Boot, Revision 1.9
>> (christos@oxygene.gw.com, Sat Jun 26 13:02:26 EDT 1999)
Booting netbsd
2064188+113100+196244 [68+138800+101255]=0x28e360
OBP version 3, revision 2.12 (plugin rev 2)
[ preserving 240576 bytes of netbsd ELF symbol table ]
console is ttya
Copyright (c) 1996, 1997, 1998, 1999
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 1.4P (GW-GENERIC) #6: Sat Dec 18 21:09:58 EST 1999
    christos@oxygene.gw.com:/net/hrothgar/src-1/NetBSD/cvsroot/src/sys/arch/sparc/compile/GW-GENERIC
total memory = 159 MB
avail memory = 140 MB
using 3072 buffers containing 12288 KB of memory
bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@3,0:d
mainbus0 (root): SUNW,SPARCstation-10
cpu0 at mainbus0: TMS390Z50 v1 @ 40 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): 
obio0 at mainbus0
clock0 at obio0 slot 0 offset 0x200000: mk48t08 (eeprom)
timer0 at obio0 slot 0 offset 0x300000 delay constant 18
zs0 at obio0 slot 0 offset 0x100000 level 12 softpri 6
zstty0 at zs0 channel 0 (console)
zstty1 at zs0 channel 1
zs1 at obio0 slot 0 offset 0x0 level 12 softpri 6
kbd0 at zs1 channel 0
ms0 at zs1 channel 1
fdc0 at obio0 slot 0 offset 0x700000 level 11 softpri 4: chip 82077
auxreg0 at obio0 slot 0 offset 0x800000
power0 at obio0 slot 0 offset 0xa01000 level 2
iommu0 at mainbus0 ioaddr 0xe0000000: version 0x3/0x0, page-size 4096, range 64MB
sbus0 at iommu0: clock = 20 MHz
dma0 at sbus0 slot 15 offset 0x400000: rev 2
esp0 at dma0 slot 15 offset 0x800000 level 4: ESP200, 40MHz, SCSI ID 7
scsibus0 at esp0: 8 targets, 8 luns per target
ledma0 at sbus0 slot 15 offset 0x400010: rev 2
le0 at ledma0 slot 15 offset 0xc00000 level 6: address 08:00:20:1e:2b:f3
le0: 8 receive buffers, 2 transmit buffers
le0: supplying EUI64: 08:00:20:ff:fe:1e:2b:f3
SUNW,bpp at sbus0 slot 15 offset 0x4800000 level 2 (ipl 3) not configured
SUNW,DBRIe at sbus0 slot 15 offset 0x8010000 level 9 not configured
cgsix0 at sbus0 slot 2 offset 0x0 level 9: SUNW,501-1672, 1152 x 900, rev 8
eccmemctl0 at mainbus0: version 0x0/0x1
scsibus0: waiting 2 seconds for devices to settle...

telnet> send break
Stopped at      cpu_Debugger+0x4:       jmpl            [%o7 + 0x8], %g0
db> where
No such command
db> t
zstty_stint(0xf0726e54, 0x0, 0xf021de2c, 0xf0184680, 0xf022a800, 0x2710) at zstty_stint+0x3c
zsc_intr_hard(0x8, 0xf071dee0, 0xfe020000, 0x21c1, 0xffff, 0xf016ea1c) at zsc_intr_hard+0x68
zshard(0x0, 0xf0172348, 0x12, 0x40, 0xf0178324, 0x7) at zshard+0x44
sparc_interrupt44c(0x2, 0x8, 0xf021d814, 0xf0178310, 0xffffffff, 0x28) at sparc_interrupt44c+0x104
ncr53c9x_intr(0xf0725000, 0xf001d778, 0x43, 0xf0178324, 0xf0178324, 0x3e8) at ncr53c9x_intr+0xef4
sparc_interrupt44c(0x0, 0x0, 0xf01ce1f8, 0x0, 0xffffffff, 0x0) at sparc_interrupt44c+0x104
mi_switch(0x8, 0x3, 0xf0212160, 0xf024d1d4, 0x0, 0xf0732000) at mi_switch+0x1a4
tsleep(0x0, 0x11, 0xf01f3198, 0x0, 0x100205, 0x2710) at tsleep+0x1f4
scsipi_execute_xs(0xf0732000, 0x0, 0x0, 0xf0732068, 0xf022ae00, 0xf022ae28) at scsipi_execute_xs+0xdc
scsi_scsipi_cmd(0xf071c580, 0xf0732000, 0x6, 0x0, 0x0, 0x2) at scsi_scsipi_cmd+0x12c
scsipi_test_unit_ready(0xf071c580, 0x1c4, 0x4c, 0xf021e640, 0x0, 0xf023f860) atscsipi_test_unit_ready+0x50
scsi_probedev(0x0, 0x3, 0xf023e800, 0xf024d16c, 0xf0213d28, 0x419010e3) at scsi_probedev+0x74
scsi_probe_bus(0xf0727dc0, 0x3, 0x0, 0xc8, 0xf0214000, 0xf0255000) at scsi_probe_bus+0x104
scsibus_config_interrupts(0xf0727dc0, 0x0, 0xf01893f4, 0x0, 0x0, 0x64) at scsibus_config_interrupts+0x44
config_process_deferred(0xf024d6f0, 0x0, 0xf024d400, 0xffffffff, 0x3c, 0xf021b000) at config_process_deferred+0x58
configure(0xf0254000, 0xf0254400, 0xf0254000, 0xf0252c00, 0x1, 0x10000000) at configure+0x5c
main(0x0, 0xfffffffc, 0xf00021b4, 0xf0213fe3, 0x30366c, 0x23ccc0) at main+0x318
Lgandul(0x300110, 0x30c4b8, 0x2ffeb4, 0x0, 0x30ec00, 0xffffffff) at Lgandul+0xdc
db>