>Number:         18459
>Category:       port-sparc64
>Synopsis:       32-bit kernels are broken
>Confidential:   no
>Severity:       critical
>Priority:       high
>Responsible:    port-sparc64-maintainer
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Sat Sep 28 20:42:00 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator:     Takeshi Nakayama
>Release:        NetBSD 1.6I (2002-09-29)
>Organization:
Private
>Environment:
System: NetBSD nyx 1.6I NetBSD 1.6I (NYX32) #97: Sun Sep 29 12:09:42 JST 2002
 takeshi@nyx:/export/anoncvs/src/sys/arch/sparc64/compile/NYX32 sparc64
Architecture: sparc
Machine: sparc64
>Description:
	I made -current 32-bit kernels for checking PR feedback,
	but it do not work.

	The next boot logs show some endian issue while accessing
	PCI bus (HDD model name is swapped).

console is /pci@1f,0/isa@7/serial@0,3f8
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 1.6I (NYX32) #95: Sun Sep 29 06:33:44 JST 2002
    takeshi@nyx:/export/anoncvs/src/sys/arch/sparc64/compile/NYX32
total memory = 384 MB
avail memory = 350 MB
using 2470 buffers containing 19760 KB of memory
bootpath: /pci@1f,0/ide@d,0/disk@0,0:d
mainbus0 (root): SUNW,UltraAX-i2
cpu0 at mainbus0: SUNW,UltraSPARC-IIe @ 500 MHz, version 0 FPU
cpu0: physical 32K instruction (32 b/l), 16K data (32 b/l), 256K external (64 b/l)
psycho0 at mainbus0
SUNW,sabre: impl 0, version 0: ign 7c0 bus range 0 to 0; PCI bus 0
DVMA map: 60000000 to 80000000
IOTSB: 419c4000 to 41a44000
pci0 at psycho0
pci0: i/o space, memory space enabled
ebus0 at pci0 dev 7 function 0
ebus0: Acer Labs M1543 PCI-ISA Bridge, revision 0x00
dma at ebus0 addr 0-ffff ipl 42 not configured
rtc0 at ebus0 addr 70-71: m5819
power at ebus0 addr 2000-2007 ipl 35 not configured
SUNW,lomh at ebus0 addr 8010-8011 ipl 42 not configured
com0 at ebus0 addr 3f8-3ff ipl 43: ns16550a, working fifo
com0: console
com1 at ebus0 addr 2e8-2ef ipl 43: ns16550a, working fifo
flashprom at ebus0 addr 0-7ffff not configured
Acer Labs M7101 Power Management Controller (miscellaneous prehistoric) at pci0 dev 3 function 0 not configured
tlp0 at pci0 dev 12 function 0: Davicom DM9102A Ethernet, pass 3.1
tlp0: broken MicroWire interface detected; setting SROM size to 1Kb
tlp0: interrupting at ivec 3006
tlp0: reset failed to complete
tlp0: Ethernet address XX:XX:XX:XX:XX:XX
tlp1 at pci0 dev 5 function 0: Davicom DM9102A Ethernet, pass 3.1
tlp1: broken MicroWire interface detected; setting SROM size to 1Kb
tlp1: interrupting at ivec 301c
tlp1: reset failed to complete
tlp1: Ethernet address XX:XX:XX:XX:XX:XX
ohci0 at pci0 dev 10 function 0: Acer Labs M5237 USB Host Controller (rev. 0x03)
ohci0: interrupting at ivec 24
ohci0: OHCI version 0.0
ohci0: unsupported OHCI revision
ohci0: init failed, error=4
pciide0 at pci0 dev 13 function 0: Acer Labs M5229 UDMA IDE Controller (rev. 0xc3)
pciide0: bus-master DMA support present
pciide0: primary channel configured to native-PCI mode
pciide0: using ivec 180c for native-PCI interrupt
wd0 at pciide0 channel 0 drive 0: <TS830002CA E>
wd0: drive supports 128-sector PIO transfers, chs addressing
wd0: 66048 MB, 65343 cyl, 4096 head, 16128 sec, 512 bytes/sect x 135266304 sectors
wd0: 32-bit data port
wd0(pciide0:0:0): using PIO mode 0, Ultra-DMA mode 2 (Ultra/33) (using DMA data transfers)
pciide0: secondary channel configured to native-PCI mode
pciide0: disabling secondary channel (no drives)
pcons at mainbus0 not configured
No counter-timer -- using %tick at 500MHz as system clock.
root on wd0d dumps on wd0b
pciide0:0:0: lost interrupt
        type: ata tc_bcount: 512 tc_skip: 0
pciide0:0:0: geometry timed out
wd0c: device timeout reading fsbn 0 (wd0 bn 0; cn 0 tn 0 sn 0), retrying

>How-To-Repeat:
	Boot with 32-bit kernels.
>Fix:
	Applying the following patch seems to fix this issue, but I
	do not know it is right.

Index: machdep.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/sparc64/sparc64/machdep.c,v
retrieving revision 1.129
diff -u -d -u -r1.129 machdep.c
--- machdep.c	2002/09/27 15:36:51	1.129
+++ machdep.c	2002/09/29 03:23:27
@@ -1810,7 +1810,6 @@
 		break;
 	}
 
-#ifdef _LP64
 	/* If it's not LINEAR don't bother to map it.  Use phys accesses. */
 	if ((flags & BUS_SPACE_MAP_LINEAR) == 0) {
 		hp->_ptr = addr;
@@ -1821,7 +1820,6 @@
 		hp->_sasi = ASI_PHYS_NON_CACHED;
 		return (0);
 	}
-#endif
 
 	if (!(flags & BUS_SPACE_MAP_CACHEABLE)) pm_flags |= PMAP_NC;
 

>Release-Note:
>Audit-Trail:
>Unformatted: