In article <20040917021735.2B5CA23419@thoreau.thistledown.com.au>
simonb@wasabisystems.com wrote:

> Can you try the following patch?

Unfortunately, it hangs before (at least) the first printf()
in memsize_bitmap().

> +LEAF_NOPROFILE(mips_mcclock_loop_with_clock)
> +	move	t0,zero			# iters = 0;

I don't know MIPS ABI very well, but is t0 free here?
Should we save s0 and use it?

> +	j	2f
> +	 nop
> +1:	nop				# asm ("nop;nop;nop;nop");
> +	nop
> +	nop
> +	nop
> +	addu	s0,1			# iters++;

This s0 (for iters) doesn't match the above "move t0,zero".

> +2:	jal	mips_cp0_cause_read	# v0 = mips_cp0_cause_read();
> +	 nop

If we call other functions, ra should be preserved?

> +	and	t0,a0			# v0 &= clockmask;
> +	beqz	t0,1b			# if zero then repeat

These t0 should be v0 (returned value from mips_cp0_cause_read())?

> +	 move	 v0,t0			# return iters
> +	j	ra

Some instruction is needed for delay slot here explicitely or not?

> +END(mips_mcclock_loop_with_clock)


The following version works fine, but I'm not sure
if the value "24" and register usage etc. are correct.

---
LEAF_NOPROFILE(mips_mcclock_loop_with_clock)
	.set	noreorder
	subu	sp, sp, 24
	sw	s0, 16(sp)
	sw	ra, 20(sp)
	move	s0, zero		# iters = 0;
	j	2f
	 nop
1:	nop				# asm ("nop;nop;nop;nop");
	nop
	nop
	nop
	addu	s0, 1			# iters++;
2:	jal	_C_LABEL(mips_cp0_cause_read)	# v0 = mips_cp0_cause_read();
	 nop
	and	v0, v0, a0		# v0 &= clockmask;
	beqz	v0, 1b			# if zero then repeat
	 move	 v0, s0			# return iters
	lw	ra, 20(sp)
	lw	s0, 16(sp)
	j	ra
	 addu	sp, sp, 24
	.set	reorder
END(mips_mcclock_loop_with_clock)
 :
---

BTW, someone also pointed out that we should consider superscalar CPUs...
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp